From 00d82f8078163df3c9ce21c0cc07c57dfa41f737 Mon Sep 17 00:00:00 2001 From: David Antliff Date: Thu, 3 Aug 2017 22:57:02 +1200 Subject: [PATCH] DS18B20 initial commit. --- .gitignore | 3 + Makefile | 9 + README.md | 5 + main/component.mk | 5 + main/ds18b20.c | 401 ++++++++++++++++++++++++++++++++++++++++++++ main/ds18b20.h | 43 +++++ main/ds18b20_main.c | 35 ++++ sdkconfig | 330 ++++++++++++++++++++++++++++++++++++ 8 files changed, 831 insertions(+) create mode 100644 .gitignore create mode 100644 Makefile create mode 100644 README.md create mode 100644 main/component.mk create mode 100644 main/ds18b20.c create mode 100644 main/ds18b20.h create mode 100644 main/ds18b20_main.c create mode 100644 sdkconfig diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..6c7c529 --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +build/ +sdkconfig.old + diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..855bc07 --- /dev/null +++ b/Makefile @@ -0,0 +1,9 @@ +# +# This is a project Makefile. It is assumed the directory this Makefile resides in is a +# project subdirectory. +# + +PROJECT_NAME := ds18b20 + +include $(IDF_PATH)/make/project.mk + diff --git a/README.md b/README.md new file mode 100644 index 0000000..4fb3c40 --- /dev/null +++ b/README.md @@ -0,0 +1,5 @@ +# Hello World Example + +Starts a FreeRTOS task to print "Hello World" + +See the README.md file in the upper level 'examples' directory for more information about examples. diff --git a/main/component.mk b/main/component.mk new file mode 100644 index 0000000..0b9d758 --- /dev/null +++ b/main/component.mk @@ -0,0 +1,5 @@ +# +# "main" pseudo-component makefile. +# +# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) + diff --git a/main/ds18b20.c b/main/ds18b20.c new file mode 100644 index 0000000..e0e2178 --- /dev/null +++ b/main/ds18b20.c @@ -0,0 +1,401 @@ +#include +#include +#include +#include +#include +#include // for PRIu64 + +#include "ds18b20.h" + +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "driver/gpio.h" +#include "esp_system.h" +#include "esp_log.h" +#include "sdkconfig.h" + +#define TAG "ds18b20" + +// ROM commands +#define DS18B20_ROM_SEARCH 0xF0 +#define DS18B20_ROM_READ 0x33 +#define DS18B20_ROM_MATCH 0x55 +#define DS18B20_ROM_SKIP 0xCC +#define DS18B20_ROM_SEARCH_ALARM 0xEC + +// Function commands +#define DS18B20_FUNCTION_TEMP_CONVERT 0x44 +#define DS18B20_FUNCTION_SCRATCHPAD_WRITE 0x4E +#define DS18B20_FUNCTION_SCRATCHPAD_READ 0xBE +#define DS18B20_FUNCTION_SCRATCHPAD_COPY 0x48 +#define DS18B20_FUNCTION_EEPROM_RECALL 0xB8 +#define DS18B20_FUNCTION_POWER_SUPPLY_READ 0xB4 + + +struct _DS18B20_Timing +{ + int A, B, C, D, E, F, G, H, I, J; +}; + +// 1-Wire timing delays (standard) in ticks (quarter-microseconds). +static const struct _DS18B20_Timing _DS18B20_StandardTiming = { + 6 * 4, + 64 * 4, + 60 * 4, + 10 * 4, + 9 * 4, + 55 * 4, + 0, // G + 480 * 4, // H + 70 * 4, // I + 410 * 4, // J +}; + +struct _DS18B20_Info +{ + bool init; + int gpio; + const struct _DS18B20_Timing * timing; +}; + +static void _tick_delay(int ticks) +{ + // Each tick is 0.25 microseconds. + float time_us = ticks / 4.0; + ets_delay_us(time_us); +} + +/** + * @brief Generate a 1-Wire reset. + * @param[in] ds18b20_info Initialised device info instance. + * @return true if device is present, otherwise false. + */ +static bool _reset(DS18B20_Info * ds18b20_info) +{ + bool present = false; + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + gpio_set_direction(ds18b20_info->gpio, GPIO_MODE_OUTPUT); + + _tick_delay(ds18b20_info->timing->G); + gpio_set_level(ds18b20_info->gpio, 0); // Drive DQ low + _tick_delay(ds18b20_info->timing->H); + gpio_set_level(ds18b20_info->gpio, 1); // Release the bus + _tick_delay(ds18b20_info->timing->I); + + gpio_set_direction(ds18b20_info->gpio, GPIO_MODE_INPUT); + int level1 = gpio_get_level(ds18b20_info->gpio); + _tick_delay(ds18b20_info->timing->J); // Complete the reset sequence recovery + int level2 = gpio_get_level(ds18b20_info->gpio); + + present = level1 == 0 && level2 == 1; // Sample for presence pulse from slave + ESP_LOGD(TAG, "reset: level1 0x%x, level2 0x%x, present %d", level1, level2, present); + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } + return present; +} + +/** + * @brief Send a 1-Wire write bit, with recovery time. + * @param[in] ds18b20_info Initialised device info instance. + * @param[in] bit The value to send. + */ +static void _write_bit(DS18B20_Info * ds18b20_info, int bit) +{ + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + int delay1 = bit ? ds18b20_info->timing->A : ds18b20_info->timing->C; + int delay2 = bit ? ds18b20_info->timing->B : ds18b20_info->timing->D; + gpio_set_direction(ds18b20_info->gpio, GPIO_MODE_OUTPUT); + gpio_set_level(ds18b20_info->gpio, 0); // Drive DQ low + _tick_delay(delay1); + gpio_set_level(ds18b20_info->gpio, 1); // Release the bus + _tick_delay(delay2); + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } +} + +/** + * @brief Read a bit from the 1-Wire bus and return the value, with recovery time. + * @param[in] ds18b20_info Initialised device info instance. + */ +static int _read_bit(DS18B20_Info * ds18b20_info) +{ + int result = 0; + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + gpio_set_direction(ds18b20_info->gpio, GPIO_MODE_OUTPUT); + gpio_set_level(ds18b20_info->gpio, 0); // Drive DQ low + _tick_delay(ds18b20_info->timing->A); + gpio_set_level(ds18b20_info->gpio, 1); // Release the bus + _tick_delay(ds18b20_info->timing->E); + + gpio_set_direction(ds18b20_info->gpio, GPIO_MODE_INPUT); + int level = gpio_get_level(ds18b20_info->gpio); + _tick_delay(ds18b20_info->timing->F); // Complete the timeslot and 10us recovery + result = level & 0x01; + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } + return result; +} + +/** + * @brief Write 1-Wire data byte. + * @param[in] ds18b20_info Initialised device info instance. + * @param[in] data Value to write. + */ +static void _write_byte(DS18B20_Info * ds18b20_info, uint8_t data) +{ + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + ESP_LOGD(TAG, "write 0x%02x", data); + for (int i = 0; i < 8; ++i) + { + _write_bit(ds18b20_info, data & 0x01); + data >>= 1; + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } +} + +/** + * @brief Read 1-Wire data byte from device. + * @param[in] ds18b20_info Initialised device info instance. + * @return Byte value read from device. + */ +static uint8_t _read_byte(DS18B20_Info * ds18b20_info) +{ + uint8_t result = 0; + + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + for (int i = 0; i < 8; ++i) + { + result >>= 1; + if (_read_bit(ds18b20_info)) + { + result |= 0x80; + } + } + ESP_LOGD(TAG, "read 0x%02x", result); + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } + return result; +} + +static uint8_t * _read_block(DS18B20_Info * ds18b20_info, uint8_t * buffer, unsigned int len) +{ + for (int i = 0; i < len; ++i) + { + *buffer++ = _read_byte(ds18b20_info); + } + return buffer; +} + +void ds18b20_init(DS18B20_Info * ds18b20_info, int gpio) +{ + if (ds18b20_info != NULL) + { + gpio_pad_select_gpio(gpio); + ds18b20_info->gpio = gpio; + ds18b20_info->timing = &_DS18B20_StandardTiming; + ds18b20_info->init = true; + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } +} + +DS18B20_Info * ds18b20_new(void) +{ + DS18B20_Info * ds18b20 = malloc(sizeof(*ds18b20)); + if (ds18b20 != NULL) + { + memset(ds18b20, 0, sizeof(*ds18b20)); + } + else + { + ESP_LOGE(TAG, "malloc failed"); + } + + return ds18b20; +} + +static uint8_t _calc_crc(uint8_t crc, uint8_t data) +{ + // https://www.maximintegrated.com/en/app-notes/index.mvp/id/27 + static const uint8_t table[256] = { + 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65, + 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220, + 35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98, + 190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255, + 70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7, + 219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154, + 101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36, + 248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185, + 140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205, + 17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80, + 175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238, + 50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115, + 202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139, + 87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22, + 233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168, + 116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53 + }; + + return table[crc ^ data]; +} + +uint64_t ds18b20_read_rom(DS18B20_Info * ds18b20_info) +{ + uint64_t rom_code = 0; + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + if (_reset(ds18b20_info)) + { + uint8_t buffer[8] = { 0 }; + _write_byte(ds18b20_info, DS18B20_ROM_READ); + _read_block(ds18b20_info, buffer, 8); + + // device provides LSB first + for (int i = 7; i >= 0; --i) + { + // watch out for integer promotion + rom_code |= ((uint64_t)buffer[i] << (8 * i)); + } + ESP_LOGD(TAG, "rom_code 0x%08" PRIx64, rom_code); + + // check CRC + uint8_t crc = 0; + for (int i = 0; i < 8; ++i) + { + crc = _calc_crc(crc, buffer[i]); + ESP_LOGD(TAG, "crc 0x%02x", crc); + } + + } + else + { + ESP_LOGE(TAG, "ds18b20 device not responding"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } + return rom_code; +} + +float ds18b20_get_temp(DS18B20_Info * ds18b20_info) +{ + float temp = 0.0f; + if (ds18b20_info != NULL) + { + if (ds18b20_info->init) + { + if (_reset(ds18b20_info)) + { + _write_byte(ds18b20_info, DS18B20_ROM_SKIP); + _write_byte(ds18b20_info, DS18B20_FUNCTION_TEMP_CONVERT); + vTaskDelay(750 / portTICK_PERIOD_MS); + + // reset + _reset(ds18b20_info); + _write_byte(ds18b20_info, DS18B20_ROM_SKIP); + _write_byte(ds18b20_info, DS18B20_FUNCTION_SCRATCHPAD_READ); + + // Without CRC: + //uint8_t temp1 = _read_byte(ds18b20_info); + //uint8_t temp2 = _read_byte(ds18b20_info); + //_reset(ds18b20_info); // terminate early + + // with CRC: + uint8_t buffer[9]; + _read_block(ds18b20_info, buffer, 9); + uint8_t crc = 0; + for (int i = 0; i < 9; ++i) + { + crc = _calc_crc(crc, buffer[i]); + ESP_LOGD(TAG, "crc 0x%02x", crc); + } + uint8_t temp1 = buffer[0]; + uint8_t temp2 = buffer[1]; + + ESP_LOGD(TAG, "temp1 0x%02x, temp2 0x%02x", temp1, temp2); + temp = (float)(((temp2 << 8) + temp1) >> 4); + } + else + { + ESP_LOGE(TAG, "ds18b20 device not responding"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is not initialised"); + } + } + else + { + ESP_LOGE(TAG, "ds18b20_info is NULL"); + } + + return temp; +} diff --git a/main/ds18b20.h b/main/ds18b20.h new file mode 100644 index 0000000..228c4cf --- /dev/null +++ b/main/ds18b20.h @@ -0,0 +1,43 @@ +#ifndef DS18B20_H +#define DS18B20_H + +#ifdef __cplusplus +extern "C" { +#endif + + +typedef struct _DS18B20_Info DS18B20_Info; + +/** + * @brief Initialise a device info instance with the specified GPIO. + * @param[in] ds18b20_info Pointer to device info instance. + * @param[in] gpio GPIO number to associate with device. + */ +void ds18b20_init(DS18B20_Info * ds18b20_info, int gpio); + +/** + * @brief Construct a new device info instance. + * @return Pointer to new device info instance, or NULL if it cannot be created. + */ +DS18B20_Info * ds18b20_new(void); + +/** + * @brief Read 64-bit ROM code from device - only works when there is a single device on the bus. + * @param[in] ds18b20_info Pointer to device info instance. + * @return The 64-bit value read from the device's ROM. + */ +uint64_t ds18b20_read_rom(DS18B20_Info * ds18b20_info); + +/** + * @brief Get current temperature from device. + * @param[in] ds18b20_info Pointer to device info instance. Must be initialised first. + * @return The current temperature returned by the device, in degrees Celsius. + */ +float ds18b20_get_temp(DS18B20_Info * ds18b20_info); + + +#ifdef __cplusplus +} +#endif + +#endif // DS18B20_H diff --git a/main/ds18b20_main.c b/main/ds18b20_main.c new file mode 100644 index 0000000..280041d --- /dev/null +++ b/main/ds18b20_main.c @@ -0,0 +1,35 @@ +#include + +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "esp_system.h" + +#include "ds18b20.h" + + +#define GPIO_DS18B20_0 (GPIO_NUM_4) + + +void app_main() +{ + DS18B20_Info * ds18b20_info = ds18b20_new(); + ds18b20_init(ds18b20_info, GPIO_DS18B20_0); + + uint64_t rom_code = ds18b20_read_rom(ds18b20_info); + printf("ROM code = 0x%08" PRIx64 "\n", rom_code); + + while (1) + { + float temp = ds18b20_get_temp(ds18b20_info); + printf("Temp = %.1f degrees C\n", temp); + vTaskDelay(1000 / portTICK_PERIOD_MS); + } + + for (int i = 10; i >= 0; i--) { + printf("Restarting in %d seconds...\n", i); + vTaskDelay(1000 / portTICK_PERIOD_MS); + } + printf("Restarting now.\n"); + fflush(stdout); + esp_restart(); +} diff --git a/sdkconfig b/sdkconfig new file mode 100644 index 0000000..b9c2fbc --- /dev/null +++ b/sdkconfig @@ -0,0 +1,330 @@ +# +# Automatically generated file; DO NOT EDIT. +# Espressif IoT Development Framework Configuration +# + +# +# SDK tool configuration +# +CONFIG_TOOLPREFIX="xtensa-esp32-elf-" +CONFIG_PYTHON="python" + +# +# Bootloader config +# +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_BOOTLOADER_LTO is not set + +# +# Security features +# +# CONFIG_SECURE_BOOT_ENABLED is not set +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set + +# +# Serial flasher config +# +CONFIG_ESPTOOLPY_PORT="/dev/cu.SLAB_USBtoUART" +# CONFIG_ESPTOOLPY_BAUD_115200B is not set +# CONFIG_ESPTOOLPY_BAUD_230400B is not set +CONFIG_ESPTOOLPY_BAUD_921600B=y +# CONFIG_ESPTOOLPY_BAUD_2MB is not set +# CONFIG_ESPTOOLPY_BAUD_OTHER is not set +CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 +CONFIG_ESPTOOLPY_BAUD=921600 +CONFIG_ESPTOOLPY_COMPRESSED=y +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_40M=y +# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +CONFIG_ESPTOOLPY_FLASHFREQ="40m" +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="2MB" +CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +CONFIG_ESPTOOLPY_BEFORE="default_reset" +CONFIG_ESPTOOLPY_AFTER_RESET=y +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +CONFIG_ESPTOOLPY_AFTER="hard_reset" +# CONFIG_MONITOR_BAUD_9600B is not set +# CONFIG_MONITOR_BAUD_57600B is not set +CONFIG_MONITOR_BAUD_115200B=y +# CONFIG_MONITOR_BAUD_230400B is not set +# CONFIG_MONITOR_BAUD_921600B is not set +# CONFIG_MONITOR_BAUD_2MB is not set +# CONFIG_MONITOR_BAUD_OTHER is not set +CONFIG_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_MONITOR_BAUD=115200 + +# +# Partition Table +# +CONFIG_PARTITION_TABLE_SINGLE_APP=y +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +# CONFIG_PARTITION_TABLE_CUSTOM is not set +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" +CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET=0x10000 +CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_APP_OFFSET=0x10000 + +# +# Compiler options +# +CONFIG_OPTIMIZATION_LEVEL_DEBUG=y +# CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set +CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y +# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set + +# +# Component config +# + +# +# Application Level Tracing +# +# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set +CONFIG_ESP32_APPTRACE_DEST_NONE=y +# CONFIG_ESP32_APPTRACE_ENABLE is not set + +# +# FreeRTOS SystemView Tracing +# +# CONFIG_AWS_IOT_SDK is not set +# CONFIG_BT_ENABLED is not set +CONFIG_BT_RESERVE_DRAM=0 + +# +# ESP32-specific +# +# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 +CONFIG_MEMMAP_SMP=y +# CONFIG_MEMMAP_TRACEMEM is not set +# CONFIG_MEMMAP_TRACEMEM_TWOBANKS is not set +# CONFIG_ESP32_TRAX is not set +CONFIG_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +# CONFIG_ESP32_ENABLE_COREDUMP is not set +# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set +CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y +CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=4096 +CONFIG_MAIN_TASK_STACK_SIZE=4096 +CONFIG_IPC_TASK_STACK_SIZE=1024 +CONFIG_NEWLIB_STDOUT_ADDCR=y +# CONFIG_NEWLIB_NANO_FORMAT is not set +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +# CONFIG_ULP_COPROC_ENABLED is not set +CONFIG_ULP_COPROC_RESERVE_MEM=0 +# CONFIG_ESP32_PANIC_PRINT_HALT is not set +CONFIG_ESP32_PANIC_PRINT_REBOOT=y +# CONFIG_ESP32_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP32_PANIC_GDBSTUB is not set +CONFIG_ESP32_DEBUG_OCDAWARE=y +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +CONFIG_TASK_WDT=y +# CONFIG_TASK_WDT_PANIC is not set +CONFIG_TASK_WDT_TIMEOUT_S=5 +CONFIG_TASK_WDT_CHECK_IDLE_TASK=y +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +CONFIG_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_0=y +# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set +CONFIG_BROWNOUT_DET_LVL=0 +# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set +CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set +CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 +CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 +# CONFIG_ESP32_XTAL_FREQ_40 is not set +# CONFIG_ESP32_XTAL_FREQ_26 is not set +CONFIG_ESP32_XTAL_FREQ_AUTO=y +CONFIG_ESP32_XTAL_FREQ=0 +CONFIG_WIFI_ENABLED=y +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +CONFIG_ESP32_WIFI_AMPDU_ENABLED=y +CONFIG_ESP32_WIFI_TX_BA_WIN=6 +CONFIG_ESP32_WIFI_RX_BA_WIN=6 +CONFIG_ESP32_WIFI_NVS_ENABLED=y +CONFIG_PHY_ENABLED=y + +# +# PHY +# +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +# CONFIG_ETHERNET is not set + +# +# FAT Filesystem support +# +CONFIG_FATFS_CODEPAGE_ASCII=y +# CONFIG_FATFS_CODEPAGE_437 is not set +# CONFIG_FATFS_CODEPAGE_720 is not set +# CONFIG_FATFS_CODEPAGE_737 is not set +# CONFIG_FATFS_CODEPAGE_771 is not set +# CONFIG_FATFS_CODEPAGE_775 is not set +# CONFIG_FATFS_CODEPAGE_850 is not set +# CONFIG_FATFS_CODEPAGE_852 is not set +# CONFIG_FATFS_CODEPAGE_855 is not set +# CONFIG_FATFS_CODEPAGE_857 is not set +# CONFIG_FATFS_CODEPAGE_860 is not set +# CONFIG_FATFS_CODEPAGE_861 is not set +# CONFIG_FATFS_CODEPAGE_862 is not set +# CONFIG_FATFS_CODEPAGE_863 is not set +# CONFIG_FATFS_CODEPAGE_864 is not set +# CONFIG_FATFS_CODEPAGE_865 is not set +# CONFIG_FATFS_CODEPAGE_866 is not set +# CONFIG_FATFS_CODEPAGE_869 is not set +# CONFIG_FATFS_CODEPAGE_932 is not set +# CONFIG_FATFS_CODEPAGE_936 is not set +# CONFIG_FATFS_CODEPAGE_949 is not set +# CONFIG_FATFS_CODEPAGE_950 is not set +CONFIG_FATFS_CODEPAGE=1 +CONFIG_FATFS_MAX_LFN=255 + +# +# FreeRTOS +# +# CONFIG_FREERTOS_UNICORE is not set +CONFIG_FREERTOS_CORETIMER_0=y +# CONFIG_FREERTOS_CORETIMER_1 is not set +CONFIG_FREERTOS_HZ=100 +CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y +# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set +# CONFIG_FREERTOS_ASSERT_DISABLE is not set +CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG=y +# CONFIG_ENABLE_MEMORY_DEBUG is not set +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024 +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +# CONFIG_FREERTOS_LEGACY_HOOKS is not set +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +# CONFIG_SUPPORT_STATIC_ALLOCATION is not set +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_FREERTOS_DEBUG_INTERNALS is not set + +# +# Log output +# +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set +CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +CONFIG_LOG_DEFAULT_LEVEL=3 +CONFIG_LOG_COLORS=y + +# +# LWIP +# +# CONFIG_L2_TO_L3_COPY is not set +CONFIG_LWIP_MAX_SOCKETS=10 +CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX=0 +# CONFIG_LWIP_SO_REUSE is not set +# CONFIG_LWIP_SO_RCVBUF is not set +CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 +# CONFIG_LWIP_IP_FRAG is not set +# CONFIG_LWIP_IP_REASSEMBLY is not set + +# +# TCP +# +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=6 +CONFIG_TCP_MSS=1436 +CONFIG_TCP_SND_BUF_DEFAULT=5744 +CONFIG_TCP_WND_DEFAULT=5744 +CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_QUEUE_OOSEQ=y +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set + +# +# UDP +# +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +CONFIG_TCPIP_TASK_STACK_SIZE=2560 +# CONFIG_PPP_SUPPORT is not set + +# +# ICMP +# +# CONFIG_LWIP_MULTICAST_PING is not set +# CONFIG_LWIP_BROADCAST_PING is not set + +# +# mbedTLS +# +CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384 +# CONFIG_MBEDTLS_DEBUG is not set +# CONFIG_MBEDTLS_UNSAFE_ACCELERATION is not set +CONFIG_MBEDTLS_HAVE_TIME=y +# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set + +# +# OpenSSL +# +# CONFIG_OPENSSL_DEBUG is not set +CONFIG_OPENSSL_ASSERT_DO_NOTHING=y +# CONFIG_OPENSSL_ASSERT_EXIT is not set + +# +# SPI Flash driver +# +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y